CHiPES HOME > RESEARCH AND DEVELOPMENT >


Algorithms to Architectures

Computer Arithmetic & Security

Design Methodologies

Embedded Signal Processing

Embedded Software

Human Computer Interaction

Vision Enabled Sensing

Reconfigurable Computing Group

Members:

Douglas L. Maskell (Assoc Prof, SCE)

Thambipillai Srikanthan (Prof, SCE)

Santanu Kumar Dash (Project Officer)

Shilpa Shanbhag (Project Officer)

Avanthi Busireddy (Research Associate)

Cui Jin (PhD)

Chen Yupeng (PhD)

Sunita Chandrasekaran (PhD)


Projects: Project Member / Contact Person:

Design Techniques for Resource-Constrained Run-Time Reconfigurable Computing

Assoc Prof Douglas L. Maskell
Re-configurable VLSI Systems for DSP Applications - Commom Sub-expression Elimination In Multiple Constant Multiplications
Assoc Prof Jong Ching Chuen
System-level Design Framework for Power Aware Reconfigurable Embedded Systems Assoc Prof Douglas L. Maskell
Soft-core Processor Enabled Design Space Exploration Santanu / Prof T. Srikanthan
Tools and Algorithms for High Level Algorithm Mapping to FPGA Sunita & Shilpa / Assoc Prof Douglas L. Maskell
High Level Power and Thermal Aware Scheduling on CMP and MPSoC Cui Jin / Assoc Prof Douglas L. Maskell
Reconfigurable architectures for Computational Biology Chen Yupeng & Avanthi / Assoc Prof Douglas L. Maskell
 
Downloads | Contact Us