|
|
Welcome to the CHiPES Digital Library. Research at CHiPES has lead to numerous research papers and whitepapers.
Referred Journals:
2007
| Tim Oliver, Bertil Schmidt, Yanto Jacop, and Douglas L. Maskell, “High-Speed Biological Sequence Analysis with Hidden Markov Models on Reconfigurable Platforms”, IEEE Trans Biomed II, 2007. |
D.L. Maskell, “Design of Efficient Multiplierless FIR Filters”, IET Circuits Devices Syst., vol 1 (2), pp. 175-180, 2007. |
X. Chen and D.L. Maskell, “Supporting Multiple-Input, Multiple-Output Custom Functions in Configurable Processors”, Journal of Systems Architecture, Vol. 53 (5-6), pp. 263-271, 2007. |
| X. Chen, D.L. Maskell and Y. Sun, “Fast Identification of Custom Instructions for Extensible Processors”, IEEE Trans. Computer-Aided Design Integr. Circuits Syst., vol. 26 (2), pp. 359-368, 2007. |
| T.F. Oliver and D.L. Maskell, “Prerouted FPGA Cores for Rapid System Construction in a Dynamic Reconfigurable System,” in press, EURASIP Journal on Embedded Systems, doi:10.1155/2007/41867, 7 pages, 2007. |
R.Mahesh, A.P.Vinod, "A New Common Subexpression Elimination Algorithm for Realizing Low Complexity Higher Order Digital Filters," IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems (IEEE TCAD), June 2007. |
| C.H.Chang, T.Srikanthan & B.Cao , "A residue-to-binary converter for a new 5-moduli set", IEEE Transactions on Circuits and Systems - I : Regular Papers, May 2007. |
Gayathri Venkataraman & Sabu Emmanuel, "Size-restricted cluster formation and cluster maintenance technique for mobile ad hoc networks", International Journal of Network Management, vol.17, no. 2, pp.171-194, March 2007. |
A.Singla, C.H.Chang, “Low power differential coefficients-based FIR filters using hardware optimized multipliers,” IET Proceedings on Circuits, Devices and Systems, February 2007. |
2006
X. Chen and D.L. Maskell, “M2E: A Multiple-Input, Multiple-Output Function Extension for RISC-Based Extensible Processors”, Lecture Notes in Computer Science, Springer-Verlag, Vol 3894, pp. 191-201, 2006. |
J.G.Wu & T.Srikanthan, "Algorithms for Area-Efficient Hardware/Software Partitioning," Journal of Supercomputing, vol.38, no.3, pp.223-235, December 2006. |
| T.F. Oliver, B. Schmidt, J. Yanto and D.L. Maskell, “Accelerating the Viterbi Algorithm for Profile Hidden Markov Models using Reconfigurable Hardware”, Lecture Notes in Computer Science, Springer-Verlag, Vol. 3991, pp. 522-529, 2006. |
J.G.Wu, "Algorithmic Aspects of Area-Efficient Hardware/Software Partitioning," Journal of Supercomputing, Vol.38, No.3, pp.223-235, December 2006. |
C.S.Lim, S.K.Lam, H.Tian, T.Srikanthan, "High Speed Segmentation of Endoscopic Images for Micro-Robotic Auto Navigation," International Journal of Humanoid Robotics (IJHR), Vol.3, No.4, pp.523-545, December 2006. |
S.Suchitra, S.K.Lam, T.Srikanthan, C.T Clarke, "Accelerating rotation of high-resolution images," IEE Proceedings on Vision, Image and Signal Processing, Vol.153, No.6, pp. 815-824, December 2006. |
Gayathri Venkataraman, Sabu Emmanuel, T.Srikanthan, " Size Restricted Cluster formation and Cluster Maintenance Technique for Mobile Ad-hoc Networks ," International Journal of Network Management, November 2006. |
S.K.Lam, T.Srikanthan, C.T.Clarke, "Rapid Generation of Custom Instructions Using Predefined Dataflow Structures," Microprocessors and Microsystems, Vol.30, No.6, pp.355-365, September 2006. |
T.F. Oliver, B. Schmidt, D.L. Maskell, D. Nathan and R. Clemens, “High-speed multiple sequence alignment on a reconfigurable platform”, Int. J. Bioinformatics Research and Applications, Vol. 2, No. 4, pp. 394-406, 2006. |
J.G.Wu & T.Srikanthan,"Accelerating the Reconfiguration of Degradable VLSI Arrays," IEE Proceedings on Circuits, Devices and Systems, Vol. 153, No.4, pp.383-389, August 2006. |
J.G.Wu & T.Srikanthan, "Reconfiguration of High Performance VLSI Sub-Arrays," IEE Proceedings on Circuits, Devices and Systems, Vol.153, no.4, pp.292-298, August 2006. |
A.P.Vinod and E.M.K.Lai, “Low Power and High-Speed implementation of FIR filters for software defined radio receivers,” IEEE Transactions on Wireless Communications, vol. 5, no. 7, July 2006. |
Leiwo, J., Kwok, LF., Maskell, D.L., Stankovic, N., “A technique for expressing IT security objectives”, Information and Software Technology, Elsevier, Vol. 48, No. 7, pp. 532-539 July, 2006. |
Yu Yu, Jussipekka Leiwo, Benjamin Premkumar, "A Study on the Security of Privacy Homomorphism," International Journal of Network Security (IJNS), July 2006. |
J.G.Wu & T.Srikanthan, "An Efficient Algorithm for the Collapsing Knapsack Problem," Information Sciences, Vol.176, no.12, pp.1739-1751, June 2006. |
D.L. Maskell and G.S. Woods, “Adaptive Subsample Delay Estimation using Windowed Correlation”, IEEE Trans. Circuits Syst. II, Vol. 53, pp 478-482, Jun., 2006. |
J.G.Wu & T.Srikanthan, "Reconfiguration Algorithms for Power Efficient VLSI Sub-Arrays with 4-port Switches", IEEE Trans. on Computers, vol. 55, no.3, pp. 243-253, Mar 2006. |
Ravi Kumar Satzoda, C.H.Chang & Ching-Chuen Jong , "High throughput and Low Complexity Bit Parallel and Bit Serial Systolic Architectures for Montgomery Modular Multiplication ", WSEAS Transactions on Circuits and Systems, vol. 5, no. 5, pp. 734-741, Mar 2006. |
J.G.Wu & T.Srikanthan, "Low-complex Dynamic Programming Algorithm for hardware /Software Partitioning", Information Processing Letters, vol.98, no. 2, pp.41-46, Feb 2006. |
A.P.Vinod, “Design and experimental evaluation of improved least squares and weighted least squares quadrature mirror filters,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E89-A, no. 1, pp. 310-315, January 2006. |
2005
Timothy F. Oliver, Bertil Schmidt and Douglas L. Maskell, “Reconfigurable Architectures for Bio-sequence Database Scanning on FPGAs”, IEEE Trans. Circuits Syst. II, Vol. 52, pp. 851-855, Dec, 2005. |
K.S. Tham and D.L. Maskell, “Software-oriented System-level Simulation for Design Space Exploration of Reconfigurable Architectures”, Lecture Notes in Computer Science, Springer-Verlag, Vol 3740, pp. 391-404, Oct., 2005. |
F.Xu, C.H.Chang, C.C.Jong, "Contention resolution algorithms for common subexpression elimination in digital filter design," IEEE Trans. on Circuits and Systems –II, vol. 52, no.10, pp. 695-700, October 2005. |
J.G. Wu and T Srikanthan, "On Power Efficient Sub-Array in Reconfigurable VLSI Meshes", Journal of Computer Science and Technology, vol. 20, no. 5, pp.647-653, October, 2005 |
Maskell, D.L. and Woods, G.S., “Adaptive subsample delay estimation using a modified quadrature phase detector”, IEEE Trans. Circuits Syst. II, Vol. 52, pp. 669-674, Oct., 2005. |
| J. Yanto, T.F. Oliver, B. Schmidt and D.L. Maskell, “Biological Sequence Analysis with Hidden Markov Models on an FPGA”, Lecture Notes in Computer Science, Springer-Verlag, Vol 3740, pp. 429-439, Oct., 2005. |
Maskell, D.L. and Liewo, J., "Hardware efficient FIR filters with a reduced adder step", IEE Electronics Letters, Vol 41, No. 22, pp. 1211-1213, Oct., 2005. |
B.Cao, T.Srikanthan, C.H.Chang, "Efficient reverse converters for the four-moduli sets {2n - 1, 2n, 2n + 1, 2n±1 - 1}," IEE Proceedings for Computers and Digital Techniques, vol.152, no.5, pp.687-696, September 2005. |
J.G.Wu, T.Srikanthan, Schroder Heiko, "Efficient Reconfigurable Techniques for VLSI Arrays with 6-port Switches," IEEE Transaction on VLSI, vol. 13, no. 8, pp.976-979, August 2005. |
Timothy Oliver, Bertil Schmidt, Darran Nathan, Ralf Clemens and Douglas Maskell, “Using reconfigurable hardware to accelerate multiple sequence alignment with ClustalW”, Bioinformatics, Vol. 21, pp. 3431 – 3432, Aug., 2005. |
Lam S.K., Sridharan K. and Srikanthan T., “VLSI-Efficient Schemes for High-Speed Construction of Tangent Graph”, Journal of Robotics and Autonomous Systems, Vol. 51, No. 4, pp. 248-260, June 2005.
|
C.H.Chang, M.Zhang, J.Gu, "A review of 0.18um full adder performances for tree structured arithmetic circuits," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 13, no. 6, pp. 686-695, June 2005. |
P.Xu, C.H.Chang, A. Paplinski, "Self organizing topological tree for on-line vector quantization and data clustering," IEEE Transactions on Systems, Man and Cybernetics- Part B, vol.35, no. 3, pp. 515-526, June 2005. |
Yu Yu, Leiwo J., Benjamin Premkumar, "How to Privately Utilize Untrustworthy Computing Power," Journal of Information Assurance and Security (JIAS), vol. 1, issue 3, April 2005. |
F.Xu, C.H.Chang, C.C.Jong, "Modified reduced adder graph algorithm for multiplierless FIR filters," IEE Electronics Letters, vol. 41, no. 6, pp. 302-303, March 2005. |
| Y. Chen and C.G. Leedham, “Decompose Algorithm For Thresholding Degraded Historical Document Images”, IEE-Vision, Image and Signal Processing. March 2005. |
| J.G. Wu and T. Srikanthan, “Accelerating the Reconfiguration of Degradable VLSI Arrays ”, IEE Proccedings—Circuits, Devices and Systems, Feb 2005. |
C.H.Chang, Z.Ye, M.Zhang, "Fuzzy-ART based adaptive digital watermarking scheme," IEEE Transactions on Circuits and Systems for Video Technology, vol. 15, no. 1, pp. 65-81, January 2005. |
Abhijit Ray, J.G. Wu and T.Srikanthan, “Knapsack Model and Algorithm for HW/SW Partitioning Problem”, Computing and Informatic, January 2005. |
| C.H. Chang, P. Xu, R. Xiao and T. Srikanthan, “New adaptive color quantization method based on self-organizing feature maps”, IEEE Transactions on Neural Networks , vol. 16, no. 1, pp. 237-249, January 2005. |
2004
S .K. Lam, K. Sridharan and T. Srikanthan, "Hardware Efficient Schemes for Logarithmic Approximation and Binary Search with Application to Visibility Graph Construction",IEEE Transactions on Industrial Electronics,Vol.51, No.6,pp. 1346-1348, Dec 2004. |
B.Cao, C.H.Chang, T.Srikanthan, "A residue-to-binary converter for a new 5-moduli set," IEEE Trans. on Circuits and Systems –I, 2004. |
Z.H.Kong, K.S.Yeo, C.H.Chang, "An ultra low-power current-mode sense amplifier for SRAM applications," Journal of Circuits, Systems and Computers, 2004. |
Z.H.Kong, K.S.Yeo, C.H.Chang, "CMOS multiple-valued current comparator circuit," IEE Proceedings, Circuits, Devices and Systems, November 2004. |
J.G. Wu and T. Srikanthan, “An Efficient Data Structure for Branch and Bound Algorithm”, Information Science, Vol. 167, pp 233-237, Nov. 2004. |
J.Gu, C.H.Chang, M.Zhang, "Ultra low voltage, low power CMOS 4-2 and 5-2 compressors for fast arithmetic circuits," IEEE Transactions on Circuits and Systems-I Regular Papers, vol. 51, no. 10, pp. 1985-1997, October 2004. |
G.R. Jagadeesh, T. Srikanthan, and X.D. Zhang, "A Map Matching Method for GPS based Real-Time Vehicle Location",Journal of Navigation, Vol. 57, No. 3, September 2004. |
K. Vivekanandarajah, T.Srikanthan, C.T.Clarke, S. Bhattacharyya, "A Novel Static Prediction Scheme for Filter Cache Structures," IEICE Transactions on Electronics, Special issue on “Low-Power System LSI, IP and Related Technologies, Vol.E87-C, No.4, pp. 543-548, April 2004. |
K. Vivekanandarajah, T. Srikanthan, S. Bhattacharya, "Energy-delay efficient filter cache hierarchy using pattern prediction scheme", IEE Proceedings - Computers and Digital Techniques, Vol. 151, Issue 2, March 2004. |
Maskell , D.L. and Woods, G.S., "An adaptive subsample delay estimator using a quadrature estimator", IEE Electronics Letters, Vol 40, No. 5, pp. 347-348, March, 2004. |
T. Srikanthan, S.K. Lam and S. Mishra, "Area-Time Efficient Sign Detection Technique for Binary Signed-Digit Number System",IEEE Transactions on Computers, Vol. 53, No. 1, January 2004, pp. 69-72. |
J.Gu, C.H.Chang, K.S.Yeo, "Algorithm and architecture of a high density, low power scalar product macrocell", IEE Proceedings, Computers and Digital Techniques, Vol. 151, No.2, pp. 161-17, March 2004. |
2003
| Maskell, D.L. and Woods, G.S., "An Adaptive Subsample Delay Estimator using a Quadrature Demodulator", ICICS-PCM 2003, Singapore, Dec., 2003. |
C. H. Chang, M. Shibu and R. Xiao, "Self organizing feature map for color quantization on FPGA" , in FPGA Implementations of Neural Networks, A. Omondi and J. Rajapakse, Ed., Kluwer Academic Publishers, Boston, USA, 2003 (Book chapter, accepted for publication) |
B. Cao, C.H. Chang and T. Srikanthan, "An efficient reverse converter for the 4-moduli set {2 n-1, 2 n, 2 n+1, 2 2n+1} based on the new Chinese Remainder Theorem", IEEE Transactions on Circuits and Systems – I, Fundamental Theory and Applications, USA, vol. 50, no. 10, pp. 1296-1303, October 2003. (Regular paper) |
| Khor, A.K., Leedham, C.G. and Maskell, D.L., "Collision and Impact Force Computation for Virtual Reality Applications", TENCON 2003, Bangalore, India, Vol 2, pp. 853-857, Oct., 2003. |
Maskell, D.L. and Woods, G.S., "Adaptive Subsample Delay Estimation using a Windowed Quadrature Phase Detector", TENCON 2003, Bangalore, India, Vol 1, pp. 91-94, Oct., 2003. |
H. Tian, S.K. Lam and T. Srikanthan, "Area-Time Efficient Between-Class Variance Module for Adaptive Segmentation Process",IEE Proceedings on Vision Image and Signal Processing, Vol. 150, No. 4, August 2003, pp. 263-269. |
J.G. Wu and T. Srikanthan, "An Improved Reconfiguration Algorithm for Degradable VLSI/WSI Arrays",Journal of Systems Architecture, vol. 49, 2003, pp.23-31. |
Oliver, T.F. and Maskell, D.L., "Towards run-time re-configuration techniques for real-time embedded applications", Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA’03), Las Vegas, pp. 141-146, June, 2003. |
N. Sudha, T. Srikanthan and Babu Mailachalam, “A VLSI architecture for 3-D self-organizing map based color quantization and its FPGA implementation", Journal of Systems Architecture, Elsevier, Vol. 48, Issue 11-12, pp.337-352, April 2003. |
2002
| Woods, G.S., Page, R.L. and Maskell, D.L., "Ground Height Detection Sensor for Control of Harvesting Equipment", Asia Pacific Microwave Conference, Kyoto, Japan, Dec., 2002. |
G.R. Jagadeesh, T. Srikanthan and K.H. Quek, "Heuristic techniques for accelerating hierarchical routing on road networks", IEEE Transactions on Intelligent Transportation Systems, Vol. 3, Issue 4, pp. 301 -309, Dec. 2002. |
S.K. Lam and T. Srikanthan, "A Linear-Approximation Based Hybrid Approach for Binary Logarithmic Conversion" , Journal of Microprocessors and Microsystems, Vol. 26, No. 8, pp.353-361, November 2002. |
Maskell, D.L. and Woods, G.S., ''Discrete-time quadrature time-of-arrival estimator for determining the subsample delay between narrowband ultrasound signals,'' IEEE Ultrasonics Symposium, Munich, pp 845-848, Oct., 2002. |
C.H. Chang, H. Tian, T. Srikanthan and C.S. Lim, "A FPGA based architecture for real time image segmentation by region growing algorithm" , SPIE/Journal of Electronics Imaging, Vol.11, No.4, pp.469-478, October 2002. |
S.K. Lam and T. Srikanthan, "Environment Modelling for Robot Navigation Using VLSI-Efficient Logarithmic Approximation Method", Journal of Intelligent & Robotic Systems (JINT), Vol. 35, No. 1, pp.23-40, September 2002. |
M. Sindhwani, T. Srikanthan and K.V. Asari, "VLSI Efficient Discrete-Time Cellular Neural Network Processor" , IEE Proceedings - Circuits, Devices and Systems, Vol.149, Issue 3, pp.167-171, June 2002. |
G.R. Jagadeesh, T. Srikanthan and K.H. Quek, "Combining hierarchical and heuristic techniques for high-speed route computation on road networks", IEE Computing and Control Engineering Journal, Vol. 13, Issue 3, pp.120-126, June 2002. |
Maskell, D.L. and Woods, G.S., "The Discrete-Time Quadrature Subsample Estimation of Delay", IEEE Trans. Instrum. Meas., Vol 51, No. 1, pp. 133-137, Feb., 2002. |
2001
S.K. Lam & T. Srikanthan, "High-Speed Environment Representation Scheme for Dynamic Path Planning", Journal of Intelligent & Robotic Systems (JINT). Vol. 32, No. 3, pp.307-319, November 2001. |
H. Tian, T. Srikanthan and K.V. Asari, "An automatic segmentation algorithm for the extraction of lumen region and boundary from endoscopic images" , IEE Medical & Biological Engineering & Computing, vol. 39, no. 1, pp. 8-14, 2001. |
J.G. Wu, Y.F. Lei and H. Schroder, "A Minimal Reduction Approach for the Collapsing Knapsack Problem", Computing and Informatic, Vol.20, pp.359-369, 2001. |
B. Cao, C.H. Chang and T. Srikanthan, "An efficient reverse converter for the 4-moduli set {2 n-1, 2 n, 2 n+1, 2 2n+1} based on the new Chinese Remainder Theorem", IEEE Transactions on Circuits and Systems – I, Fundamental Theory and Applications, USA, vol. 50, no. 10, pp. 1296-1303, October 2003. (Regular paper) |
2000
S. Dobrev, H. Schroder, O. Sykora and I. Vrto, "Evolutionary Graph Colouring", Information Processing letters, 76, pp. 91-94, 2000. |
S.K. Lam and T. Srikanthan, "Dynamic Multicast Routing in VLSI" , Journal of Computer Communications, Vol. 23, No. 11, pp.1055-1063, June 2000.
|
|
